HCPL 7840 PDF

When used with a shunt resistor in the current path, the HCPL offers superior reliability, cost effectiveness, size and autoinsertability compared with the traditional solutions such as current transformers and Halleffect sensors. The HCPL consists of a sigma-delta analog-to-digital converter optically coupled to a digital-to-analog converter. Superior performance in design critical specifications such as common-mode rejection, offset voltage, nonlinearity, operating temperature range and regulatory compliance make the HCPL the clear choice for designing reliable, lower-cost, reduced-size products such as motor controllers and inverters. Low offset voltage together with a low offset voltage temperature coefficient permits accurate use of auto-calibration techniques. A wide operating temperature range with specified performance allows the HCPL to be used in hostile industrial environments.

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When used with a shunt resistor in the current path, the HCPL offers superior reliability, cost effectiveness, size and autoinsertability compared with the traditional solutions such as current transformers and Halleffect sensors. The HCPL consists of a sigma-delta analog-to-digital converter optically coupled to a digital-to-analog converter.

Superior performance in design critical specifications such as common-mode rejection, offset voltage, nonlinearity, operating temperature range and regulatory compliance make the HCPL the clear choice for designing reliable, lower-cost, reduced-size products such as motor controllers and inverters.

Low offset voltage together with a low offset voltage temperature coefficient permits accurate use of auto-calibration techniques. A wide operating temperature range with specified performance allows the HCPL to be used in hostile industrial environments. Motor Phase and Rail Current Sensing? Inverter Current Sensing? General Purpose Current Sensing and Monitoring? Contact your Hewlett-Packard sales representative or authorized distributor for more information.

Measured from input terminals to output terminals, shortest distance path along body. Through insulation distance, conductor to conductor, usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity. Parameter Symbol Min. Unit Test Conditions Fig. Unit Vrms? This test mode is not intended for customer use. Exact offset value is dependent on layout of external bypass capacitors.

Nonlinearity is defined as half of the peak-to-peak output deviation from the best-fit gain line, expressed as a percentage of the full-scale differential output voltage.

CMRRIN is defined as the ratio of the gain for differential inputs applied between pins 2 and 3 to the gain for common mode inputs applied to both pins 2 and 3 with respect to pin 4. When the differential input signal exceeds approximately mV, the outputs will limit at the typical values shown. Short-circuit current is the amount of output current generated when either output is shorted to VDD2 or ground.

HP does not recommend operation under these conditions. CMR also known as IMR or Isolation Mode Rejection specifies the minimum rate of rise of a common mode noise signal applied across the isolation boundary at which small output perturbations begin to appear. These output perturbations can occur with both the rising and falling edges of the common mode waveform and may be of either polarity.

A CMR failure is defined as a perturbation exceeding mV at the output of the recommended application circuit Figure See applications section for more information on CMR. CMRR is defined as the ratio of differential signal gain signal applied differentially between pins 2 and 3 to the common mode gain input pins tied to pin 4 and the signal applied between the input and the output of the isolation amplifier at 60 Hz, expressed in dB. F delta quantization noise. Chopper noise results from chopper stabilization of the output op-amps.

It occurs at a specific frequency typically kHz and is not attenuated by the onchip output filter. The on-chip filter does eliminate most, but not all, of the sigma-delta quantization noise. An external filter circuit may be easily added to the external postamplifier to reduce the total RMS output noise. See applications section for more information. Device considered a two terminal device: Pins 1, 2, 3 and 4 connected together; pins 5, 6, 7 and 8 connected together.

VDD1 1 8 0. F Figure 1. Input Offset Voltage Test Circuit. Input Offset Change vs. Figure 3. Figure 4. Output Voltages vs.

Input Voltage. F Figure 5. Gain and Nonlinearity Test Circuit. Gain Change vs. Figure 7. Figure 8. Nonlinearity Error Plot vs. Nonlinearity vs. Fibure Figure Full-Scale Input Voltage.

Input Current vs. Input Supply Current vs. Output Supply Current vs. Common Mode Rejection Test Circuit. Amplitude Response vs. Temperature Figure Recommended Application Circuit Bandwidth. In operation, the sigmadelta modulator converts the analog input signal into a highspeed serial bit stream. The time average of this bit stream is directly proportional to the input signal. This stream of digital data is encoded and optically transmitted to the detector circuit.

The detected signal is decoded and converted back into an analog signal, which is filtered to obtain the final output signal. Application Circuit The recommended application circuit is shown in Figure A floating power supply which in many applications could be the same supply that is used to drive the high-side power transistor is regulated to 5 V using a simple three-terminal voltage regulator U1.

And finally, the differential output of the isolation amplifier is converted to a ground-referenced single-ended output voltage with a simple differential amplifier circuit U3 and associated components.

Although the application circuit is relatively simple, a few recommendations should be followed to ensure optimal performance. Supplies and Bypassing As mentioned above, an inexpensive 78L05 three-terminal regulator can be used to reduce the gate-drive power supply voltage to 5 V. As shown in Figure 23, 0. F bypass capacitors C2, C4 should be located as close as possible to the input and output power supply pins of the HCPL The bypass capacitors are required because of the highspeed digital nature of the signals inside the isolation amplifier.

F bypass capacitor C3 is also recommended at the input pin s due to the switchedcapacitor nature of the input circuit. The input bypass capacitor should be at least pF to maintain gain accuracy of the isolation amplifier. Inductive coupling between the input power-supply bypass capacitor and the input circuit, including the input bypass capacitor and the input leads of the HCPL, can introduce additional DC offset in the circuit.

Several steps can be taken to minimize the mutual coupling between the two parts of the circuit, thereby improving the offset performance of the design. Separate the two bypass capacitors C2 and C3 as much as possible even putting them on opposite sides of the PC board , while keeping the total lead lengths, including traces, of each bypass capacitor less than 20 mm. Avoid using sockets, as they will typically increase both loop area and inductance.

And finally, using capacitors with small body size and orienting them perpendicular to each other on the PC board can also help. The value of the shunt should be chosen as a compromise between minimizing power dissipation by making the shunt resistance smaller and improving circuit accuracy by making it larger and utilizing the full input range of the HCPL Hewlett-Packard recommends four different shunts which can be used to sense average currents in motor drives up to 35 A and 35 hp.

Table 1 shows the maximum current and horsepower range for each of the LVR-series shunts from Dale. Even higher currents can be sensed with lower value shunts available from vendors such as Dale, IRC, and Isotek Isabellenhuette. When sensing currents large enough to cause significant heating of the shunt, the temperature coefficient of the shunt can introduce nonlinearity due to the signal dependent temperature rise of the shunt.

Using a heat sink for the shunt or using a shunt with a lower tempco can help minimize this effect. The Application Note , Designing with Hewlett-Packard Isolation Amplifiers, contains additional information on designing with current shunts. The recommended method for connecting the isolation amplifier to the shunt resistor is shown in Figure This allows a single pair of wires or PC board traces to connect the isolation amplifier circuit to the shunt resistor. In some applications, however, supply currents flowing through the power-supply return path may cause offset or noise problems.

In this case, better performance may be obtained by connecting pin 3 to the negative terminal of the shunt resistor separate from the power supply return path. When connected this way, both input pins should be bypassed. Whether two or three wires are used, it is recommended that twisted-pair wire or very close PC board traces be used to connect the current shunt to the isolation amplifier circuit to minimize electromagnetic interference to the sense signal.

The 68? The resistor performs another important function as well; it dampens any ringing which might be present in the circuit formed by the shunt, the input bypass capacitor, and the wires or traces connecting the two. Undamped ringing of the input circuit near the input sampling frequency can alias into the baseband producing what might appear to be noise at the output of the device.

To be effective, the damping resistor should be at least 39?. PC Board Layout In addition to affecting offset, the layout of the PC board can also affect the common mode rejection CMR performance of the isolation amplifier, due primarily to stray capacitive coupling between the input and the output circuits. To obtain optimal CMR performance, the layout of the printed circuit board PCB should minimize any stray coupling by maintaining the maximum possible distance between the input and output sides of the circuit and ensuring that any ground plane on the PCB does not pass directly below the HCPL Using surface mount components can help achieve many of the PCB objectives discussed in the preceding paragraphs.

An example through-hole PCB layout illustrating some of the more important layout recommendations is shown in Figures 25 and The particular op-amp used in the post-amp is not critical; however, it should have low enough offset and high enough bandwidth and slew rate so that it does not adversely affect circuit performance.

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