DL0165R DATASHEET PDF

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Advanced Burst-Mode Operation. This device is an integrated. The integrated PWM controller features. When compared to a discrete. This device is a basic. Adapt- Open Adapt- Open. Table 1. Notes: 1. Typical continuous power in a non-ven-. Maximum practical continuous power in an open frame. Typical Circuit. Vstr Drain. Vfb Vcc Source. Figure 1. Typical Flyback Application. Electrical Characteristics. Startup Voltage Vstr Breakdown. Drain-Source Breakdown Voltage. Off-State Current.

On-State Resistance 1. Input Capacitance. Output Capacitance. Reverse Transfer Capacitance. Turn On Delay Time. Rise Time. Turn Off Delay Time. Fall Time. Output Frequency. Output Frequency Modulation. Frequency Change With Temperature 2. Maximum Duty Cycle. Minimum Duty Cycle. Start threshold voltage. Stop threshold voltage. Feedback Source Current. Internal Soft Start Time. Burst Mode Voltages. Drain to Source Peak Current Limit. Current Limit Delay 3. Thermal Shutdown.

I DSS. C ISS. C OSS. C RSS. Sense FET switching. T D OFF independent of. F OSC. F MOD. D MAX. D MIN. V STOP. V BURH. V BURL. I OVER.

T CLD. FPS switching. Delay current 5uA charges the Cfb. Following Vcc. RC fb. I delay. Figure 6. Over load protection. When the tempera-. The voltage across the resistor is then compared with a. If the sensing resistor voltage is greater. Here, pulse by pulse.

Then, Vfb. Because excess. In order to prevent this situation, an over. In general,. Vcc instead of directly monitoring the output voltage. In order to avoid undes-. Out Driver. The typical soft start time is. The pulse width to the power switching device is progres-. The voltage on. It also helps to prevent transformer saturation and. V AOCP. Figure 7. In addition to start-up, soft-. When the gate turn-on. Drain current. Current limit. This device is an integrated high voltage power switching regulator which combine an avalanche rugged Sense FET with a current mode PWM control block.

This device is a basic platform well suited for cost effective designs of flyback converters. Over load protection 4. The voltage across the resistor is then compared with a preset AOCP level. Then, Vfb climbs up in a similar manner to the over load situation, forc- ing the preset maximum current to be supplied to the SMPS until the over load protection is activated. Because excess energy is provided to the output, the output voltage may exceed the rated voltage before the over load protection is activated, resulting in the breakdown of the devices in the secondary side.

In order to prevent this situation, an over voltage protection OVP circuit is employed. In order to avoid undes- ired activation of OVP during normal operation, Vcc should be properly designed to be below 19V. The typical soft start time is 15msec, as shown in figure 8, where progressive increments of Sense FET current are allowed during the start-up phase.

The pulse width to the power switching device is progres- sively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased with the intention of smoothly establishing the required output volt- age.

It also helps to prevent transformer saturation and reduce the stress on the secondary diode. In addition to start-up, soft- start is also activated at each restart attempt during auto- restart and when restarting after latch mode is activated. Fairchild Semiconductor.

Analog Devices.

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DL0165R – FPS – FSDL0165R – Fairchild

It offers a large amount of data sheet, You can free PDF files download. The updated every day, always provide the best quality and speed. Advanced Burst-Mode Operation. This device is an integrated. The integrated PWM controller features.

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